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Senior Principal Compiler Engineer - SV AI NPUs
Job in
Burlington, Middlesex County, Massachusetts, 01805, USA
Listed on 2026-05-24
Listing for:
Cadence
Full Time
position Listed on 2026-05-24
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
Cadence is seeking a Senior Engineer in the System Verification Group to develop the next generation of hardware verification technology. This role focuses on evolving the System Verilog compiler to handle the complexities of AI and hyperscale chip designs.
The successful candidate will work on compiler architecture and language evolution while undertaking performance engineering to optimize compilation speed. The position offers significant impact in the semiconductor industry and a competitive salary range.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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