Front End Engineer

Cupertino, California, United States Hardware

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA.

Design and develop hardware for iPhone, iPad, and Mac Book products.

Develop functional unit used by GPU (graphics processing unit) hardware.

Work with the architecture group to define the unit micro architecture specification.

Implement RTL code for the design to follow the specification.

Work with the verification team to compile the test plan for both functionality and performance validation.

Conduct all the required debug to bring up the unit, closing coverage with the verification team.

Quantify the performance benefit of the features and algorithms implemented in hardware.

Debug performance issues to identify problems and optimize design to achieve the performance target.

Work with driver, compiler and app engineers to improve GPU performance.

Work with physical design team to close timing for the design unit.

Optimize design to achieve optimal area and power goals.

40 hours/week.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.

The base pay range for this role is between $182,127 - $272,100/yr and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.

Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.

Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

• Master’s Degree or foreign equivalent in Electrical Engineering or related field and 4 years of experience in the job offered or related occupation.
• 4 years of experience with each of the following skills is required:
• Using computer architecture and multiple level cache design with the ability to write micro-architecture specifications
• Utilizing System Verilog or Verilog to write RTL for memory sub-system caching blocks in Graphics Processing Unit
• Utilizing simulation tools including Verdi for RTL bring up, debug, coverage closure, and performance verification
• Utilizing synthesis tools and collaborating with physical design team for timing closure and optimization
• Utilizing experience with Compressor and Decompressor Codec development and bringup
• Designing techniques for low power including logic depth reduction and clock gating, performance, and area optimization for efficient ASIC design
• Utilizing post-silicon debug to validate functionality on actual hardware.

• N/A

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