SOC Design Verification

ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.

Own SOC-level verification and emulation for our AI accelerator silicon. Work with chip-design and software teams driving Density

AI's AI accelerator program from first silicon through scale-out.

• Own SOC-level verification and emulation for our AI accelerator silicon.
• Use and develop AI‑assisted tool flows to accelerate verification and emulation timelines.

• Exceptional abilities in specifications, test benches, debug, and automation across full‑chip verification of complex SOCs
• Master's + 10 years of experience in full‑chip verification, emulation, and debug for functional closure of complex SOCs
• Demonstrated ability to own end‑to‑end SOC pre‑silicon verification, working with specifications, AMS designs, and IP integration flows
• (Optional) RISC‑V, formal verification, emulation platforms (Palladium, Veloce, or equivalent), or post‑silicon bring‑up

Base salary: $230k – $420k USD per year, depending on experience and qualifications. Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO. Discussed in detail during the interview.

Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.

Density

AI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.