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Digital Design Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: AXONNE
Full Time position
Listed on 2026-05-19
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

Job Summary

We are seeking a skilled and motivated Digital Design Engineer to join our growing team. In this role, you will play a key part in the architecture, design, and development of ASICs for high-speed network applications in the automotive domain. You’ll work cross-functionally to bring advanced digital designs from concept through tape-out, helping shape the future of automotive technology.

Key Responsibilities
  • Define ASIC architecture, microarchitecture, and design specifications.
  • Drive and contribute to ASIC development from concept to tape-out.
RTL Design
  • Design and implement digital logic using Verilog and/or VHDL.
  • Optimize data paths, control logic, and interface blocks for performance and efficiency.
  • Develop comprehensive test plans, test benches, and assertions for functional verification.
  • Perform simulations using industry-standard tools to validate design functionality and performance.
  • Work closely with analog/mixed-signal, verification, software, and systems teams to ensure successful integration.
  • Support silicon bring-up and debug, and assist in production validation activities.
Compliance & Standards
  • Ensure designs meet automotive industry standards including ISO 26262.
  • Integrate safety and functional requirements into the design and verification process.
Required Qualifications
  • Bachelor’s or Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or a related field.
  • 5+ years of hands‑on experience in ASIC design, preferably within the semiconductor or automotive sector.
  • Strong grasp of digital logic design.
  • Proficient with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor).
  • Excellent problem-solving and debugging skills; collaborative team player.
Preferred Qualifications
  • Familiarity with Ethernet Layer 2 protocols such as IEEE 802.1Q, PTP, and TSN.
  • Experience porting code into FPGA for emulation.

Axonne is an equal‑opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees.

Note

Axonne does not accept unsolicited referrals from recruitment agencies for all open positions.

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