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Electronics Engineer Engineering Design & Technologists

Senior SRAM Compiler & ASIC IP Design Engineer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-06-04
Job specializations:
  • Engineering
    Electronics Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 181100 - 318400 USD Yearly USD 181100.00 318400.00 YEAR
Job Description & How to Apply Below
A leading technology company in Santa Clara is seeking an experienced Compiler Circuit Design Engineer to contribute to innovative ASIC design. In this role, you will drive the development of SRAM and register files, collaborate with compiler vendors, and integrate new ideas into the design process. The ideal candidate will have a BS degree and at least 10 years of experience in circuit design.

Competitive benefits include stock options, comprehensive medical coverage, and educational reimbursement.
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Position Requirements
10+ Years work experience
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