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R&D Engineering, Director

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Synopsys, Inc.
Full Time position
Listed on 2026-05-30
Job specializations:
  • Engineering
    Systems Engineer, Packaging Engineer, Manufacturing Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent 15 years or more deep in the semiconductor packaging world, moving from design through analysis to manufacturing, and you have learned that the real work happens at the intersection of all three. You know what breaks in a DDR5 layout before the sim finishes running, and you have debugged enough HBM3 signal integrity issues to recognize the pattern before the customer even sends the stackup.

You think in terms of full 3

DIC flows, from die stack to package to PCB, because you have lived through enough tape-outs to know that optimizing one layer without understanding the next is how projects slip.

You are the kind of engineer who can sit with a customer's packaging team, ask three clarifying questions, and walk out with a plan that actually solves their problem instead of just answering their original ask. You build influence without a title, and you coach engineers not by telling them what to do but by showing them how to think through the tradeoff.

You bring an outside-in view because you have seen what works in production and what only works in PowerPoint.

What You'll Be Doing
  • Lead R&D strategy and execution for semiconductor packaging solutions spanning IC package design, signal and power integrity analysis, and 3

    DIC integration
  • Drive technical engagements with customers on advanced packaging challenges involving PCIe, DDR5, HBM3, HBM4, and HBM4E high-speed interfaces
  • Own the roadmap for packaging design and analysis tool capabilities, working directly with product teams to translate customer pain points into product requirements
  • Build and lead a team of packaging engineers, providing technical mentorship and coaching while establishing best practices across design, simulation, and manufacturing workflows
  • Work hands‑on with industry standard layout, design, and SIPI analysis tools to validate approaches, troubleshoot customer escalations, and guide architectural decisions
  • Represent Synopsys in technical forums, customer design reviews, and industry consortia focused on advanced packaging and 3

    DIC methodologies
  • Partner with sales and field application engineering teams to shape customer solutions and close technical gaps that unlock new business opportunities
The Impact You Will Have
  • Shape the direction of Synopsys packaging solutions used by leading semiconductor companies designing the next generation of AI, HPC, and mobile systems
  • Accelerate customer time to market by solving complex signal integrity, power delivery, and thermal challenges that would otherwise stall tape‑outs
  • Grow a team that becomes the technical authority customers rely on when their most critical packaging problems need solving
  • Influence product roadmaps that directly affect how thousands of engineers design and validate advanced packages and 3

    DIC systems
  • Establish Synopsys as the go‑to partner for customers navigating the shift from 2.5D to full 3

    DIC integration
  • Drive adoption of new methodologies and tools that reduce design iterations and improve first‑pass success rates for complex packaging projects
  • Build long‑term strategic relationships with customers that position Synopsys at the center of their most important programs
What You'll Need
  • 15 or more years of hands‑on experience in semiconductor packaging engineering, covering design, analysis, and manufacturing
  • Deep technical expertise in IC packaging across the full flow, from die attach and interconnect design through package assembly and board integration
  • Proven experience with high‑speed interface design and analysis for PCIe, DDR5, HBM3, HBM4, or HBM4E
  • Working knowledge of industry standard tools for package layout, design, and signal and power integrity analysis
  • Demonstrated ability to lead and grow engineering teams, including…
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