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Senior Design Verification CAD Engineer, Silicon, Cloud
Job in
Sunnyvale, Santa Clara County, California, 94086, USA
Listed on 2026-06-08
Listing for:
Google
Full Time
position Listed on 2026-06-08
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
_corporate_fare_ Google _place_ Sunnyvale, CA, USA
** Mid*
* Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
*
* Minimum qualifications:
*
* + Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience.
+ 5 years of experience working with Computer-aided design (CAD).
+
Experience with System Verilog, Hardware Design, Automation, Design Verification Test.
*
* Preferred qualifications:
*
* + Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.
+ Experience planning and deploying new tools and flows to users.
+ Knowledge of the chip design process for design and verification.
+ Ability to present and explain novel methods to users.
** About the job*
* In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Senior Engineer within Google's silicon team, you will help deliver products that have a substantive impact on the Technical Infrastructure that powers Google. You will provide leadership to a group of hardware engineers in a fluid environment with a focus on infrastructure for chip design. You will also lead the technical projects from the concept/planning stage through execution and closure.
In this role, you will help your team deliver designs that work for the first time in a number of different application areas. Leveraging your technical and leadership expertise, you will lead the chip design process improvement projects in multiple areas of expertise.
The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $163000 - $237000 (USD) + 15% bonus target + bonus + equity + benefits
Learn more about benefits at Google () .
** Responsibilities*
* + Lead CAD methodology engineers to provide support for chip Design Verification (DV) teams, and manage and mitigate support issues for tool flows.
+ Partner with chip project teams to influence and standardize methodology across functional areas and geography.
+ Perform or guide technical evaluations of tools for possible deployment.
+ Collaborate with teams across Google to identify and create strategic opportunities for improved chip design across Google.
+ Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions.
Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.
See also Google's EEO Policy () ,Know your rights: workplace discrimination is illegal ( Know Your Rights 10 20.pdf) ,Belonging at Google ((Use the "Apply for this Job" box below).) , andHow we hire () .
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants…
Position Requirements
10+ Years
work experience
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