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Senior TPU RTL Design Engineer Speed Interconnects
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-06-09
Listing for:
Google Inc.
Full Time
position Listed on 2026-06-09
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
Google Inc. is seeking an experienced engineer in Sunnyvale, CA to lead the high-performance ASIC design and RTL execution for AI hardware. The successful candidate will collaborate with system architects and software teams, owning the complete RTL lifecycle to ensure performance and efficiency standards are met.
This role demands a Bachelor's or advanced degree in relevant engineering fields, alongside substantial practical experience in ASIC design and digital systems integration. Candidates will benefit from a competitive salary, bonuses, equity, and comprehensive benefits.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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