Design Verification Engineer, GLS & Hardware Emulation
08001, Barcelona, Cataluna, España
Publicado en 2026-10-14
-
Ingeniería
Ingeniero de Hardware, Ingeniero de Pruebas, Ingeniero Electrónico
Our partner is looking for a Design Verification Engineer to support gate level simulation and hardware emulation for advanced semiconductor designs.
The role focuses on validating synthesized designs, identifying timing and functional issues, and supporting hardware emulation before silicon production. You will collaborate with RTL, DFT, physical design and firmware teams.
Location: Barcelona, Spain, Hybrid
Level: Mid / Senior, depending on experience
ResponsibilitiesConfigure and debug gate level simulations (GLS)
Perform functional, timing and power verification
Support hardware emulation and system bring-up
Debug RTL and netlist mismatches
Investigate timing, reset and X propagation issues
Implement SDF timing annotation
Automate simulation and emulation workflows
Support scan, ATPG and BIST verification
Enable firmware testing through emulation
Improve simulation performance and regression efficiency
Collaborate with RTL, DFT and physical design teams
3+ years of ASIC or SoC verification experience
Degree in Electrical or Computer Engineering or related field
Practical gate level simulation experience
Hardware emulation or FPGA prototyping experience
Verilog/System Verilog
VCS, Xcelium or Questa
SDF annotation and timing simulation
Clocking, reset and STA fundamentals
Low power concepts, UPF/CPF
Python, Perl or TCL scripting
Git/Perforce and LSF/Grid
Strong debugging and problem solving skills
Siemens Veloce, Cadence Palladium or Synopsys Ze Bu
UVM verification
DFT, scan, ATPG and MBIST
UPF simulation and power verification
Firmware bring-up on emulation
Large SoC verification
Physical design and timing closure knowledge
Emulation performance optimization
Flexible working hours
Hybrid model, 4 days office, 1 day from home
1 week per year working from anywhere
25 days annual leave plus December 24 and 31
Monthly food allowance
Private medical insurance
Relocation bonus
Housing search support
Visa support, subject to approval
Family relocation support, subject to eligibility
Virtual shares, subject to plan terms
Language classes
Tax incentive, subject to eligibility
(Si este trabajo está en su jurisdicción, entonces puede estar usando un Proxy o VPN para acceder a este sitio, para seguir avanzando, debe cambiar su conectividad a otro dispositivo móvil o PC).