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DSP Communication Engineer

Trabajo disponible en: 04810, Madrid, Andalucia, España
Empresa: Gilat Satellite Networks
Tiempo completo puesto
Publicado en 2026-02-11
Especializaciones laborales:
  • Desarrollo de Software
    Ingeniero de Software Integrado, Ingeniero de Software
Rango Salarial o Referencia de la Industria: 30000 - 50000 EUR Anual EUR 30000.00 50000.00 YEAR
Descripción del trabajo

We are Gilat. Anywhere on the planet and in space, we bring Boundless Communications.

At Gilat Satellite Networks, (NASDAQ: GILT, TASE: GILT) we’re not just shaping the future of satellite communications—we’re transforming how the world connects. From bridging the digital divide to powering in-flight connectivity and delivering combat-proven advanced SATCOM solutions, we're driving deep-tech satellite innovation. We believe in the right of all people to be connected and are united in our resolution to provide communication solutions to all reaches of the world.

Who

we are looking for

We are looking for a hands‑on DSP Communication Engineer who operates at the intersection of physical‑layer signal processing and deep real‑time embedded development
. You will design, optimize, and implement PHY algorithms (synchronization, channel estimation/equalization, OFDM/DFT‑s‑OFDM, MIMO, FEC, etc.) and bring them to life on embedded platforms with microsecond and nanosecond deadlines
. The role requires strong mastery of RTOS concepts, interrupts, DMA
, and deterministic execution, as well as the ability to quickly understand unfamiliar codebases and learn new platforms and domains.

5G/ is an advantage; PHY‑layer signal processing expertise is required.

What you will do
  • Real‑time pipelines: Design deterministic, low‑latency (µs/ns) execution across ISRs, DMA, and RTOS tasks; manage jitter, cache behavior, and timing budgets.
  • Embedded SoC development: C/C++ on ARM‑based platforms; low‑level HW interfaces (SPI, I2C, PCIe, Ethernet) and high‑rate I/Q streaming.
  • RTOS & low‑level systems: Interrupts, DMA, timers, drivers; bounded‑latency operation on FreeRTOS, Zephyr, VxWorks, , or bare metal.
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