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HRSTFG Advanced Circuits and Methods Heterogeneous Integration

Trabajo disponible en: 04810, Madrid, Andalucia, España
Empresa: EURAXESS Ireland
Tiempo completo posición
Publicado en 2026-01-09
Especializaciones laborales:
  • Ingeniería
    Ingeniero Electrónico, Ingeniero de sistemas
Rango Salarial o Referencia de la Industria: 10000 - 30000 EUR Anual EUR 10000.00 30000.00 YEAR
Descripción del trabajo
Puesto: HRS2026/003 TFG on Advanced Circuits and Methods for Heterogeneous Integration

Offer Description

  • Analog CMOS circuit design and test.
  • Validation, verification and testing of chiplets for heterogeneous integration.
  • RF Design and Test.
Where to apply

E-mail m.lopez.vallejo

Requirements

Research Field Engineering » Other Education Level Undergraduate

Research Field Computer science Education Level Undergraduate

Skills/Qualifications

Students of a bachelor degree on Electrical and Electronics Engineering, Telecommunication or similar.

This is a position for students who have completed all bachelor's subjects, being only pending the defense of their TFG or who will complete them during academic year 2025-26.

Specific Requirements

- Background on design of mixed-signal circuits.
- Valuable Knowledge of comercial design tools like Cadence / Synopsys.
- Competence in computer architectures and digital system design with HDLs (Verilog or VHDL).
- Knowledge heterogeneous integration or chiplet design.
Currently, pursuing a master's degree with specific content on electronic design, the work can be used as Master thesis at the end of the 25-26 academic year.

Languages ENGLISH Level Excellent

Languages SPANISH Level Excellent

Research Field Other Years of Research Experience 1 - 4

Additional Information

The contracted researcher will participate in a joint program with INDRA, an international Spanish-based company, within the project “Chair UPM-INDRA in microelectronics”.

Continuous training in mixed-signal and RF circuit design.

Eligibility criteria

- Academic records at bachelor's level.
- Previous experience in the design of electronic circuits.
- Level of compliance with the specific requirements.

Additional comments

Work Location(s)

Number of offers available 2 Company/Institute Information Processing and Telecommunication Center (IPTC), ETSI Telecomunicación Country Spain State/Province Madrid City Madrid Postal Code 28040 Street Avenida Complutense, 30 Geofield

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