Digital Design and Verification Engineer

Digital Design and Verification Engineer page is loaded## Digital Design and Verification Engineer locations:
Spain, Valencia, Cortes Valencianastime type:
Full time posted on:
Posted Todayjob requisition :
R252429
** About Analog Devices
** Analog Devices, Inc. (NASDAQ:  ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible.

Learn more at  and on  and .Position is for a digital design engineer working on RTL logic development and design verification of ASIC designs for MEMS products. This could include individual block developments as well as system-level design and verification work.

Responsibilities include:

* Interpretation of product requirements and participation in architecture planning discussions
* Development and optimization of digital logic blocks and systems, including communication ports, digital signal processing components, clocking infrastructures, and other digital functions as needed
* Comprehensive documentation including architecture and design reviews
* Comprehensive design verification plans for digital blocks and systems
* Development of verification components including testbench agents, scoreboard code, testcases, as well as overall testbench design

Required qualifications:

* Experience developing and testing synthesized RTL designs using Verilog
* Understanding of how RTL logic designs convert to synthesized gates and the power, area, and timing tradeoffs associated with different logic design techniques
* Experience writing testbench code in Verilog for testing RTL designs
* Experience simulating and debugging both RTL designs and associated gate-level structural netlist

Additional preferred qualifications:
* Experience using synthesis and place-and-route tools
* Understanding of timing constraints and how to write and interpret them based on given timing specifications
* Expertise in UVM for verification and testbench development
* Understanding of DSP topics such as digital filter design and frequency domain signal analysis
* For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
** Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
* Job Req Type:
Experienced Required Travel:
Yes, 10% of the time Shift Type: 1st Shift/Days
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