Principal Digital Design Engineer

Responsibilities

• Use Verilog and System Verilog to design digital blocks, subsystems, and top‑level designs.
• Define and develop system-level architectures for complex digital designs.
• Lead technical teams on complex digital design projects.
• Collaborate across functions to drive innovative solutions.
• Engage directly with customers on technical requirements and solutions.
• Mentor engineers and help develop technical talent.
• Write detailed block and subsystem-level specifications for design and implementation.
• Perform block‑and top‑level linting, CDC analysis, and power analysis.
• Assist with synthesis constraints and timing closure.
• Communicate closely with mixed‑signal designers and verification engineers to support mixed‑signal simulations and real‑number modeling across the analog/digital boundary.
• Prepare technical documentation and lead architecture, design, and peer reviews.
• Support silicon bring‑up, characterization, and debug activities.
• Collaborate across analog, digital, verification, test, and product definition teams to define requirements, support production test development, and ensure successful product execution.

• Bachelor's or Master's degree in Electrical/Electronic Engineering or equivalent experience
• 8-12 years of relevant experience in digital design engineering
• Strong hands‑on RTL coding experience and debugging skills.
• Knowledge of digital design for data filter/processing, MATLAB experience beneficial
• FPGA prototyping beneficial
• Knowledge of system on‑chip solutions with processors (ARM preferred)
• Knowledge of processor architectures and bus fabric protocols (AHB,AXI,…)
• Knowledge of digital interfaces (SPI/I2C/SPMI/I3C/UART/…).
• Knowledge of UVM beneficial
• Experience in mentoring junior engineers is desirable
• Proven analytical and problem solving skills