Principal STA Synthesis Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Our Silicon Lifecycle Management (SLM) business is dedicated to building next-generation intelligent in-chip sensors, advanced hardware/software capabilities, and analytics that integrate into technology products to manage and improve every stage of the semiconductor lifecycle. We offer the world’s first full hardware IP, test, and end-to-end analytics solution, helping customers accelerate integration, optimize performance, power, area, schedule, and yield, and enhance reliability.

Our SLM solutions enable differentiated products to reach the market quickly and with reduced risk.

You are an accomplished engineer with a deep passion for advancing semiconductor technology and a proven track record in static timing analysis and synthesis. With a minimum of 8 years’ experience in the industry, you thrive in dynamic environments where innovation, precision, and collaboration are paramount. You have honed your expertise through hands‑on work with advanced process nodes, and you are adept at navigating the complexities of IP, subsystem, and chip‑level STA.

Your technical prowess in RTL2

GDS physical implementation, signoff, and place & route is complemented by your ability to see the bigger picture—balancing technical excellence with project planning and execution.

You are a natural mentor, eager to share your knowledge and uplift those around you. Communication is your strong suit, enabling you to bridge gaps between cross‑functional teams and external partners. You approach challenges with curiosity and creativity, always seeking new ways to enhance workflows and methodologies. Your adaptability and resilience allow you to excel in global, multicultural environments, and you are motivated by the opportunity to drive impactful change.

If you are passionate about shaping the future of chip design and eager to work on cutting‑edge SLM IPs and subsystems, Synopsys wants to hear from you.

• Leading the development and execution of STA methodologies for advanced SLM IPs, controllers, and on‑chip monitors across the latest process nodes (16nm to 3nm and beyond).
• Designing and implementing comprehensive STA plans, checkers, and review processes at the IP, subsystem, and chip levels.
• Overseeing the RTL2
  
  GDSII flow, including synthesis, place & route, timing closure, and signoff for both soft and mixed‑signal IPs.
• Collaborating closely with design, verification, and product teams to ensure successful project execution and timely delivery.
• Driving innovation by developing custom scripts and enhancing flows to optimize execution and improve design methodologies.
• Mentoring junior engineers and fostering a culture of technical excellence, collaboration, and continuous improvement.
• Engaging with customers and internal stakeholders to resolve technical challenges and support successful tape‑outs.

• Accelerate the delivery of high‑performance, reliable SLM solutions to market, enabling customers to achieve faster time‑to‑market with reduced risk.
• Enhance the quality and efficiency of physical design implementation through robust STA strategies and process improvements.
• Drive successful timing closure and tape‑outs for leading‑edge semiconductor products across advanced process nodes.
• Contribute to the evolution of Synopsys’ SLM product portfolio, ensuring state‑of‑the‑art innovation and differentiation.
• Support the integration of intelligent in‑chip sensors and analytics, empowering customers to optimize performance, power, and yield.
• Strengthen Synopsys’ leadership position in the global semiconductor ecosystem through technical expertise and customer engagement.

• 12+ years of relevant experience
• Strong experience in STA concepts, tools, and methodologies at the…