Senior Verification Engineer

Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.

As a Silicon Verification Engineer, you will be reporting to the Director of Frontend Silicon, and will be based in either our Bristol or London office in the UK. We are looking for you to take an active role in building world‑class ML/AI IC products for scale‑out to data centre applications. You will be ambitious and have a proven track record in working in high‑performance delivery organisations in the discipline of pre‑silicon RTL verification.

We are looking for someone who is passionate about verification – not someone content to go through the motions, but rather looking to push the field further forwards. If you get excited about bringing software concepts to hardware workflows, and enjoy improving established practices to increase tape‑out quality and bring down costs, then this is the role for you.

Our preferred candidate will be comfortable working alongside colleagues across the organisation from disciplines such as modelling, system architecture and RTL design. You’ll be frequently collaborating to ensure our RTL releases are of the highest functional quality, and that the entire company shares the same definition of a functionally correct product. This means contributing to discussions around specification, architecture and the workflows surrounding them.

You’ll be a key contributor to our highly disruptive and ambitious product.

• Software mindset for solving hardware problems
• The desire to be in a high impact role in a small team
• A disrupter of the “status quo” of hardware development
• Eagerness to contribute to and improve working practices and help build connections between hardware and software teams
• Detail‑focused, with rigour as the baseline for all work
• Humility, desire to learn
• Happy to be part of a fast‑paced, open and collaborative environment

• Verification planning and execution from specification
• Building test benches
• Functional modelling of hardware blocks
• Checker creation
• Strong software skills
  • Python preferred, other languages acceptable
• Understanding of digital hardware concepts
  • Ability to read and debug RTL in System Verilog
  • Familiarity with debugging waveforms

• Whether in UVM, System
  
  C or another methodology
• System Verilog Assertions (SVA)
• Software fluency in multiple languages
• Open source tools for silicon development
  • Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog
• Commercial EDA tools
• Formal verification
• Bazel is our chosen tool, familiarity is not expected
• Contributing to architecture discussions

• Ownership and execution: you will have full agency to drive your work forward
• Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines
• Full‑stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact
• Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there
• Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter who’s it is

• Founded in 2022, team of 70+ which is expanding rapidly
• Modern, open offices in London and Bristol
• Collaborative, problem‑solving culture built on deep curiosity, entrepreneurial initiative and technical fluency

Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.