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Job Description:
The Mixed Signal Development Group is responsible for delivering analog and Mixed-Signal IPs to product divisions within Microchip. We work with leading edge CMOS processes to produce analog integrated circuits for wireline applications. We enable technology that allows Microchip’s products to interface to the outside world.
As a member of the Mixed-Signal Development Group, the candidate will be engaged in the mixed-signal IP support and debug of PLLs, high speed SERDES, ADCs, DACs, and other analog building blocks.
Responsibilities:
Define the requirements for Mixed-Signal IPs in discussion with the SoC architects
Collaborate with IP vendors to customize IP solutions and finalize Statement of Work (SOW)
Manage IP intake processes, including pre-licensing and post-acquisition QA, integration, and sign-off reviews
Support Mixed-Signal IP through post-tape out phase, including lab testing, customer bring-up and debug
Active involvement in lab testing, support and debug of mixed-signal and SERDES blocks
Ownership of circuit and system specifications
Design CMOS analog and mixed-signal integrated circuits
Requirements/
Qualifications:
Bachelor’s degree in electrical engineering or related field with strong analog/mixed-signal background and at least 10 years of mixed-signal CMOS circuit design experience, or a Master’s degree with at least 7.5 years of such experience.
Deep understanding of the mixed-signal analog design flow steps including architecture, design, and integration
Experience with high-speed SERDES and/or PLL circuits
Experience with circuit simulators (HSPICE, Spectre, etc.)
Experience working with PCIe, SAS, SATA and Ethernet protocols is a plus
Experience working with chiplet technologies is a plus
Possess understanding of device physics and basic ESD/Latch-up concepts
Strong written and oral communication skills
Ability to work in a team environment
Innovative and creative thinker
Ability to quickly ramp on new projects
Travel Time:
0% - 25%Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is 86,.*
* Range is dependent on numerous factors including job location, skills and experience.
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