Senior AI Processor Software & Hardware Co-design Engineer

Senior AI Processor Software & Hardware Co-design Engineer

Join to apply for the Senior AI Processor Software & Hardware Co-design Engineer role at Huawei Technologies Research & Development (UK) Ltd

Key responsibilities, qualifications and offerings for the role are listed below.

• Be responsible for one of the sub technical direction of AI Processor Software & Hardware Co-design Lab, identify key root technologies related to NPU chips, develop evolution strategies and roadmaps, promote and implement the evolution strategies to build industry-leading technical competitiveness, support Huawei's business success in the computing field.
• Carry out technology and business innovation, integrate several sub-domains of application algorithms, frameworks, runtime, modelling and simulation, and compilers from the perspective of processors, and build end-to-end architecture competitiveness.
• Grasp the AI industry and technology trends, gain insight into the development direction of AI applications and algorithms, develop key technical architectures of basic AI software and hardware, and resolve key usability and performance issues in full-stack AI through technical projects.

Note: This job description is an outline of the tasks, responsibilities and outcomes required of the role. The jobholder will carry out other duties as may be reasonably required by the line manager. The description and personal specification may be reviewed as needs evolve.

Required:

• Rich experience in optimizing AI chip architectures and AI systems, familiar with mainstream heterogeneous computing software and hardware architectures, with capabilities from applications to basic software to chips.
• Hands-on experience of one of the following technologies:
  Numerical Calculation, Compilation, Algorithm & chip co-design, Runtime, Shared Memory.
• Knowledge of AI industry application scenarios, familiar with mainstream models and algorithm development trends, and able to extract requirements for the chip layer.
• Proficient in identifying bottlenecks based on scenarios such as NLP and large models to drive software architecture evolution.

Desired:

• Experience in software usability improvement projects.
• Experience in several sub-fields of AI application algorithms, frameworks, runtime, modelling and simulation, and compilers.
• Understanding of methods, platforms, and tools used by AI head manufacturers, with experience in transforming research into commercial products.

• 33 days annual leave entitlement per year (including UK public holidays)
• Group Personal Pension
• Life insurance
• Private medical insurance
• Medical expense claim scheme
• Employee Assistance Program
• Cycle to work scheme
• Social events
• Additional time off for learning and development

• Mid-Senior level

• Full-time

• Other
• Industries:
  Telecommunications

Haverhill, England, United Kingdom