Low-Power ASIC Design Engineer
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Engineering
Electronics Engineer, Systems Engineer, Engineering Design & Technologists, Electrical Engineering
Job Description & How to Apply Below
Apple Inc. in Cupertino, CA, is seeking researchers to advance low power semiconductor designs. The role focuses on developing and verifying power-efficient ASIC techniques, prototyping with RTL, and validating circuits for reliability and testability.
Responsibilities include creating automation tools to scale design modifications and evaluating power savings across system levels. A Master’s degree and experience in low power design are required, with relocation possible.
As a Low-Power ASIC Design Engineer, you will play an important part at Apple, Inc. in Cupertino, CA, United States.
The advertised compensation is 154..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Low-Power ASIC Design Engineer role in the description above.
We appreciate your interest in this position.
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