Principal SoC​/SiP Architect; AI-Assisted Design & Architecture Enablement

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Join imec’s Falcon Research Center in Qatar in a visionary technical leadership role where you’ll architect next‑generation compute platforms for HPC and Mobile applications while simultaneously building the AI‑driven tools, frameworks, and methodologies that enable unprecedented design productivity and innovation.

Imec Qatar is a new regional office where we drive our mission of pioneering innovative semiconductor solutions that lay the foundation for a smarter, greener, and truly AI‑driven future. Specializing in advanced design tools for emerging technologies like silicon photonics and 3D integrated circuits, imec Qatar is at the forefront of chip development. And we’re driving the future with intelligent solutions to optimise infrastructure, and deep‑tech innovations targeting applications for a sustainable society.

This is more than just a new office – it’s the start of an exciting journey. With the launch of imec Qatar, you have the unique opportunity to join us from day one and help shape the future of semiconductor innovation in the region. Be part of the team from the very beginning, joining us as Principal SoC/SiP Architect (AI‑Assisted Design & Architecture Enablement).

Join imec’s Falcon Research Center in Qatar as Principal SoC/SiP Architect, pioneering the convergence of artificial intelligence and semiconductor design. You will lead the transformation of how RISC‑V based System‑on‑Chip and System‑in‑Package platforms are conceived, designed, and optimised by developing and deploying AI‑assisted methodologies that revolutionise architecture exploration, design‑space optimisation, and system validation.

In this visionary technical leadership role, you’ll architect next‑generation compute platforms for HPC and Mobile applications while simultaneously building the AI‑driven tools, frameworks, and methodologies that enable unprecedented design productivity and innovation. Your work will establish a new paradigm where machine learning accelerates every phase of the SoC/SiP lifecycle – from early architecture exploration through physical implementation and validation.

• Pioneer AI‑driven methodologies for SoC/SiP architecture design‑space exploration and optimisation
• Develop machine learning models for:
  Automated architecture generation and configuration optimisation
• Performance prediction across workloads and design points
• Power/performance/area (PPA) optimisation using reinforcement learning
• Floor planning and chiplet placement optimisation for SiP designs
• Workload characterisation and hardware‑software co‑optimisation
• Create surrogate models enabling rapid evaluation of thousands of architecture variants
• Build AI‑assisted frameworks for design validation, verification planning, and bug prediction
• Define reference architectures for RISC‑V based SoC and SiP platforms targeting HPC and mobile domains
• Architect complete systems, including:
  Multi‑core CPU subsystems with AI‑optimised configurations
• Memory hierarchies optimised through ML‑driven exploration
• NoC designs generated and optimised using graph neural networks
• Heterogeneous compute platforms (CPU+GPU+accelerators) with AI‑assisted integration
• Build comprehensive AI‑assisted design enablement infrastructure and tool chains
• Develop automated flows for RTL generation, synthesis optimisation, and timing closure using ML
• Create intelligent debugging and root‑cause analysis tools leveraging anomaly detection
• Establish data pipelines capturing design metrics, simulation results, and performance data

• Lead cross‑functional initiatives integrating AI/ML researchers, SoC architects, and chip designers
• Mentor architects and engineers on AI‑assisted design methodologies and tools
• Establish best practices for trustworthy AI in critical design decisions
• Define metrics and validation frameworks ensuring AI recommendations are reliable and explainable

• Publish groundbreaking research at premier venues (ISSCC, DAC, ICCAD, ISCA, NeurIPS)
• Pre…