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MAPS ASIC Digital IC Design Engineer – RTL/Verilog
Job in
Genf, Geneva, Switzerland
Listed on 2026-01-01
Listing for:
CERN
Full Time
position Listed on 2026-01-01
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading scientific organization in Switzerland is seeking a digital ASIC design engineer for their advanced MAPS particle-detector ASICs. This position focuses on designing high-performance digital circuits, collaborating with specialists in the field, and managing the full RTL-to-GDS flow. Candidates should have experience in digital IC design, knowledge of VLSI principles, and proficiency in relevant scripting and verification tools. The role promises competitive benefits including a monthly stipend and comprehensive health coverage.
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