Digital ASIC Design Engineer

Digital ASIC Design Engineer

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A leading innovator in advanced semiconductor solutions is seeking a talented Digital ASIC Design Engineer to contribute to the development of high-speed digital interfaces and next-generation chip-to-chip communication technologies. This role is ideal for engineers who enjoy solving complex design challenges and delivering cutting-edge solutions in a collaborative environment.

You will collaborate closely with analog and mixed-signal teams to define interfaces, implement RTL code, and ensure that performance, timing, and power targets are achieved.

• MSc or higher in Electrical, Electronics, or related Engineering field
• Experience in 2+ successful tapeouts
• Experience in high-speed PHY design or similar interface technologies (USB4, PCIe, or equivalent)
• Proficiency in RTL coding, preferably in System Verilog
• Strong understanding of low-power and high-speed digital design principles
• Experience with clock domain crossing (CDC) issues and timing closure
• Knowledge of verification approaches and familiarity with UVM is advantageous

Mid-Senior level

Full-time

Engineering and Information Technology

Staffing and Recruiting

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