Formal Verification Engineer

Director | Semiconductor, Automotive Tech & Embedded Systems Formal Verification Engineer – Advanced Semiconductor Systems

Locations: Switzerland or UK

We are seeking an experienced Formal Verification Engineer to contribute to the development of next‑generation semiconductor technologies. This role is ideal for someone who enjoys solving complex hardware verification challenges and working within collaborative, high‑performance engineering teams.

• Develop and refine formal verification methodologies, flows and best practices.
• Participate in RTL design reviews and provide input for quality improvements.
• Create detailed verification plans based on design specifications and functional requirements.
• Drive formal sign‑off, documenting results, coverage metrics, and closure criteria.
• Plan and schedule assigned verification tasks to ensure on‑time project delivery.
• Maintain verification environments, track defects, and support root‑cause analysis.

• Strong communication skills, analytical thinking, and the ability to work effectively in cross‑functional teams.
• Proficiency in scripting (Python, Perl, or Tcl) for automation and regression management.
• Deep understanding of Formal Verification techniques and assertion‑based verification approaches.
• Solid knowledge of metrics‑driven verification, including test planning and coverage closure.
• Experience with temporal logic assertion languages such as SVA or PSL.
• Familiarity with simulation‑based verification methodologies (beneficial).
• Excellent debugging, problem‑solving, and analytical capabilities.
• Understanding of instruction‑set architectures, micro‑architecture behaviour, and on‑chip bus systems.
• Experience with leading formal verification tools (e.g., Jasper Gold, One Spin, or equivalent).

• 5+ years in the semiconductor industry, focused on formal or functional verification.
• Proven background verifying complex FPGA or ASIC designs in high‑volume or high‑reliability applications.
• Ability to balance verification quality, performance, and schedule constraints.
• Experience collaborating with RTL designers to create micro‑architecture‑level formal specifications.
• Experience developing reusable, scalable formal models and verification codebases.
• Knowledge of high‑speed interfaces or complex digital protocols is an advantage.

Bachelor’s degree (or higher) in Electrical Engineering, Electronics Engineering, Computer Engineering, or equivalent field.

Mid‑Senior level

Full-time

Design, Engineering, and Research

Semiconductor Manufacturing, Computer Hardware Manufacturing, and Computers and Electronics Manufacturing