Skip to content
×

Senior FPGA​/ASIC Logic Design Engineer; Quantum​/Low-Latency

Listing for: DCV Technologies
Full Time position Listed on 2026-11-05
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 180000 USD Yearly USD 120000.00 180000.00 YEAR

Job Description & How to Apply Below

Position: Senior FPGA/ASIC Logic Design Engineer (Quantum/Low-Latency)

DCV Technologies seeks an Expert Logic Design Engineer (FPGA/ASIC) for an advanced R&D project developing FPGA- and ASIC-based control and measurement systems used in quantum computing.

You will take technical ownership of complex, high-performance digital subsystems, focusing on deterministic timing, low latency, and design quality in a collaborative environment with verification, software and hardware teams.

We are looking to fill the Senior FPGA/ASIC Logic Design Engineer (Quantum/Low-Latency) position at DCV Technologies in United States.

Please review the full job details above before applying.

If your experience matches this role, we encourage you to apply.

All applications are reviewed carefully by our team.

This is a Full Time role.

The position is based in United States.

This opportunity is part of our work in Engineering.

The advertised compensation is 120..

Position Requirements

10+ Years work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).

Search for further Jobs Here:

10 MILLION+ Job Search Platform:
(Try combinations for better Results! Or enter less keywords for broader Results)
Education Level
Experience Level (years)
Posted in last:
Salary