Senior Principal ASIC Architect – Ethernet & NICs; Germany, On-Site
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Engineering
Hardware Engineer, Systems Engineer
Job Description & How to Apply Below
Astera Labs is seeking a Senior Principal ASIC Design Engineer to drive architecture and lead RTL design for Ethernet/ESUN connectivity products. You will shape high-performance NIC datapaths, RDMA features, and memory interfaces while coordinating with firmware and software teams to ensure robust, manufacturable silicon.
Based in Germany on-site, you will mentor engineers, tackle scale-up networking challenges, and guide the project from design through tapeout and post-silicon bring-up.
We would love to welcome a new Senior Principal ASIC Architect – Ethernet & NICs (Germany, On-Site) to our organisation in United States.
All applications are reviewed carefully by our team.
This is a Full Time role.
The position is based in United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 123..
We aim to respond to suitable candidates as soon as possible.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).