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ASIC Verification Engineer — SystemVerilog​/UVM Pro

Job in Ottawa, Ontario, Canada
Listing for: High Tech Genesis Inc.
Full Time position
Listed on 2025-11-18
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Test Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 CAD Yearly CAD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
A leading design services company in Ottawa is seeking a Verification Engineer to push technological boundaries. The ideal candidate has experience in System Verilog, UVM, and programming skills in C and Python. You will develop verification plans, create test benches, and collaborate with systems engineers. This position offers a dynamic work environment within a diverse team committed to innovation.
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