Skip to content
×

ASIC Physical Design Engineer

Listing for: Piper Companies
Full Time position Listed on 2026-11-06
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer, Systems Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 120000 - 180000 USD Yearly USD 120000.00 180000.00 YEAR

Job Description & How to Apply Below

ASIC Physical Design Engineer

Piper Companies is seeking an ASIC Physical Design Engineer to join an industry-leading semiconductor organization focused on next-generation data center infrastructure. The ASIC Physical Design Engineer will play a critical role in developing complex custom silicon solutions from customer specifications through physical implementation and tape-out. This position is onsite in Raleigh, NC and offers the opportunity to work on cutting-edge ASIC designs supporting the rapidly growing data center market.

Responsibilities of the ASIC Physical Design Engineer:
  • Own physical design implementation activities from RTL-to-GDSII, including synthesis, floor planning, place and route, clock tree synthesis (CTS), and timing closure.
  • Perform static timing analysis (STA), signal integrity analysis, power integrity verification, and physical verification to achieve design signoff requirements.
  • Collaborate closely with RTL, design verification, DFT, and architecture teams to resolve timing, power, and implementation challenges.
  • Develop and enhance physical design methodologies, automation flows, and QoR optimization strategies using scripting and custom tools.
  • Support advanced-node ASIC development for high-performance data center applications through tape-out and production readiness.
Qualifications of the ASIC Physical Design Engineer:
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with 5+ years of ASIC physical design experience.
  • Strong expertise in RTL-to-GDSII implementation flow, including Cadence Innovus, Synopsys ICC2, Fusion Compiler, Design Compiler, or Genus.
  • Experience with STA tools such as Prime Time or Tempus and hands-on timing closure, MMMC analysis, ECO implementation, and signoff.
  • Knowledge of DRC/LVS verification, low-power methodologies (UPF/CPF), power integrity analysis, and advanced process nodes including FinFET technologies.
  • Proficiency with Tcl, Perl, Python, Linux/Unix environments, and automation of physical design flows.
Compensation for the ASIC Physical Design Engineer includes:
  • Competitive salary range depending on experience
  • Comprehensive benefits package including medical, dental, vision, 401(k), PTO, and holiday

This job opens for applications on 11/02/2026. Applications for this job will be accepted for at least 30 days from the posting date.

To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).

Search for further Jobs Here:

10 MILLION+ Job Search Platform:
(Try combinations for better Results! Or enter less keywords for broader Results)
Education Level
Experience Level (years)
Posted in last:
Salary