ASIC RTL Design Engineer AI Accelerators | PTO

Mentium Technologies Inc. in Santa Barbara, CA seeks an experienced ASIC RTL Design Engineer to design, implement and test complex RTL components for its AI accelerator.

You will collaborate with system architects, verification, physical design and software teams to deliver high-quality designs that meet aggressive PPA goals. You will work with front-end EDA tools, focus on Verilog/System Verilog, and help integrate PCIe IP into the SoC, driving timing, power and area trade-offs while staying

This posting is for the ASIC RTL Design Engineer for AI Accelerators | Flexible PTO role at Mentium Technologies Inc., based in Santa Barbara, CA, United States.

This opportunity is part of our work in Engineering.

The advertised compensation is 150..

This role offers the option to work remotely.

We aim to respond to suitable candidates as soon as possible.