Senior Emulation Architect - Pre-Silicon Validation
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Engineering
Test Engineer, Validation Engineer, Systems Engineer
Job Description & How to Apply Below
Astera Labs in San Jose, CA seeks a Principal Emulation Engineer to build and operate emulation environments for stress-testing complex ASICs and SoCs prior to silicon. You will lead cross-functional verification with design, firmware and systems teams, and validate PCI Express, CXL, Ethernet, DDR, NVMe and related interfaces across pre-silicon validation, with hands-on debugging and technical leadership.
You will contribute to a robust verification strategy, scale-up emulation workflows, and
Our team is growing, and we are hiring a Senior Emulation Architect
- Pre-Silicon Validation in San Jose, CA, United States.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Emulation Architect
- Pre-Silicon Validation role in the description above.
We appreciate your interest in this position.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).