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1 day ago Be among the first 25 applicants
This range is provided by Cognichip. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range $/yr - $/yr
About the job At Cognichip, we’re not just building AI—we’re redefining what’s possible at the nexus of silicon design and machine learning. As a Staff FPGA Design Engineer, you will fuse chip design expertise with cutting‑edge ML to create the intelligent, end‑to‑end silicon design flows. If you thrive on pushing the envelope of the possible and translating cutting‑edge ideas into production‑grade systems, this is your stage.
What you'll do Serve as the domain expert, embedding chip design intuition into a team creating AI chip design assistants
Architect modern EDA workflows, from spec to bitstream
Drive the development of agentic AI systems capable of authoring syntactically and semantically correct RTL, manage IP integration, and constructing processor‑based designs
Create an ecosystem of libraries, tools, agents, workflows, and benchmarks to increase design velocity
Design and synthesize high‑quality, complex datasets (RTL, IP, constraints, failure modes) to train models on hardware physics and logic
Define rigorous verification standards and guide the agent in generating robust UVM test benches, assertions and coverage models to ensure generated designs are correct‑by‑construction
What You Bring Masters in Computer Science, Electrical Engineering, or a closely related field
10‑15 years of experience in RTL design, or a combination of design and verification
Deep expertise with AMD/Xilinx (Vivado, Vitis) and Altera/Intel (Quartus) ecosystems, including SoC and complex IP integrations
Knowledge of industry‑standard communication protocols (AXI, Ethernet, PCIe, DDR5, SPI, I2C, NoC, etc)
Proficiency in System Verilog, Python, and TCL
Excellent written and verbal communication skills, especially to convey chip design knowledge to software engineers and AI scientists
Comfortable working in a dynamic, research‑heavy AI‑oriented startup environment
Bonus Points The following items are not required but are great bonuses:
Personal projects showcasing innovation, creativity, and continuous learning
Knowledge of open‑source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
Demonstrated coursework or project experience in machine learning and/or deep learning
What it's like here We’re a fast‑moving AI startup with a collaborative, high‑trust culture. You’ll work with top‑tier engineers, scientists, and builders—solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you’re excited to build the future of engineering, you’ll feel right istics This position is available in Toronto.
We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote.
How to apply
Don’t meet every single requirement? Feel over‑qualified? That’s okay—if you're excited about our mission, we’d still love to hear from you. We are growing fast and need a world class team of various experience levels.
Seniority level Mid‑Senior level
Employment type
Full‑time
Job function Engineering and Research
Industries Semiconductor Manufacturing
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