Digital Design Verification Engineer

Taalas is looking for passionate and motivated Digital Design Verification Engineers to make an impact in the AI Inference field.

The right candidate will not be afraid to attack complex problems, including designing and implementing novel DV architectures, as well as stimulus, checker, and coverage implementation and closure.

Job Responsibilities   Write specifications, test benches, and stimulus.
Debug simulations and waveforms, working with designers to fix bugs.
Create UVM, C, and Python test benches and verification infrastructure.
Potentially work with formal verification and emulation.
Create tools/scripts to verify chip functionality in pre‑/post‑silicon environments.
Provide technical support to cross‑functional teams during chip bring‑up and product validation.
Qualifications   Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
Proficiency in Verilog and/or VHDL.
Strong understanding of digital design concepts, including synchronous/asynchronous design, finite state machines, and clock domain crossing.
Knowledge of verification flows and methodologies (e.g., UVM).
Excellent programming and scripting skills (e.g., C/C++, Python, Perl).
Familiarity with industry‑standard protocols and interfaces, such as PCIe, USB, and DDR, is desirable.
Strong problem‑solving, communication, and collaboration skills.
Interested in joining our team? Submit your resume to    to be considered for this exciting opportunity!

Location:

Markham, Ontario, Canada

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