×
Register Here to Apply for Jobs or Post Jobs. X

Physical Design Engineer

Job in Toronto, Ontario, M5A, Canada
Listing for: Acceler8 Talent
Full Time position
Listed on 2026-01-01
Job specializations:
  • IT/Tech
    Systems Engineer
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 180000 CAD Yearly CAD 180000.00 YEAR
Job Description & How to Apply Below
Overview  This range is provided by Acceler8 Talent. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range  $/yr - $/yr
Recruiter  Acceler8 Talent is working with an AI Hardware Startup developing next-generation AI hardware designed for efficiency, scalability, and performance across edge-to-cloud computing environments. Their technology brings together advanced architectures and streamlined software integration to enable high-performance AI in power- and space-constrained systems. We’re seeking a  Senior Physical Design Engineer  with deep expertise in chip-level implementation and EDA tools to help deliver industry-leading silicon.
Responsibilities   Leading physical design activities across chip and block levels, driving successful implementation from floor planning through signoff
Managing timing closure, physical verification, and optimization for power, performance, and area
Developing and refining low-power design strategies and ensuring proper integration across design hierarchies
Running and debugging EM/IR checks, power grid analysis, and related reliability verifications
Writing and maintaining automation scripts (Tcl, Python, or similar) to streamline design flows and validation steps
Collaborating with front-end design, CAD, and methodology teams to ensure robust and scalable implementation practices
Evaluating and improving physical design methodologies and EDA tool flows for new process technologies
Ideal background   10+ years of direct experience in physical design and chip implementation (excluding logic design or CAD roles)
Strong, hands-on knowledge of EDA tools- particularly Cadence- used in chip implementation
Proven expertise in timing analysis, timing closure, and hierarchical floor planning
Solid understanding of low-power design principles and debugging methodologies

Experience with EM/IR analysis and issue resolution, including power grid verification
Proficiency in scripting languages such as Tcl and Python for automation and flow development
Familiarity with physical verification processes and foundry tapeout requirements
Additional experience with PDK management or advanced flow evaluations is a plus
Seniority level   Mid-Senior level

Employment type

Full-time
Industries   Computer Hardware Manufacturing
Semiconductor Manufacturing

Note:

This description focuses on the job responsibilities and qualifications relevant to the role and excludes unrelated postings and boilerplate.

#J-18808-Ljbffr
Note that applications are not being accepted from your jurisdiction for this job currently via this jobsite. Candidate preferences are the decision of the Employer or Recruiting Agent, and are controlled by them alone.
To Search, View & Apply for jobs on this site that accept applications from your location or country, tap here to make a Search:
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary