Senior RTL Design Engineer – DDR​/HDL IP

A leading semiconductor company in Vancouver is seeking a senior RTL engineer to join their DDR PHY design team. The ideal candidate will analyze complex digital design problems and implement RTL for high-speed DDR. Responsibilities include microarchitectural design, ASIC design flow development, and collaboration with various teams to ensure functional correctness. Strong analytical and communication skills are required, along with a degree in Electrical Engineering.

This role offers a collaborative environment focused on innovation.
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