Principal ASIC Digital Design Engineer- IP Development

Job Title

Principal ASIC Digital Design Engineer

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You are a highly experienced digital design professional with a strong track record in architecting and implementing complex RTL-based IP cores. With a deep passion for solving intricate technical challenges, you bring over 15 years of hands‑on experience in ASIC design and development, specifically within the context of high‑performance, low‑power, and robust system‑on‑chip (SoC) solutions. You thrive in dynamic, globally distributed teams, and you’re motivated by the opportunity to work on next‑generation technologies that enable breakthroughs in AI, machine learning, automotive, and cloud infrastructure.

You are detail‑oriented and methodical, with the ability to translate high‑level requirements into precise micro‑architectures and design specifications. Your expertise spans multiple industry‑standard protocols (such as DDR, PCIe, AMBA, Ethernet, USB, and MIPI), and you are adept at leveraging industry‑leading EDA tools for simulation, synthesis, and formal verification. You are proactive, capable of working independently, and always seeking opportunities to innovate and drive technical excellence.

Your communication skills enable you to collaborate effectively with cross‑functional teams, mentor junior engineers, and articulate complex technical concepts clearly. With a growth mindset, you are eager to continue expanding your skills in safety standards, design automation, and emerging technologies.

• Translating standards and functional specifications into detailed architecture and microarchitecture specifications for advanced digital IP cores.
• Making critical architectural decisions and leading the development of complex RTL designs from concept through implementation.
• Collaborating with verification teams to define and refine verification plans, and supporting the creation of robust test strategies.
• Writing high‑quality Verilog/System Verilog code and using simulation tools to validate design functionality and performance.
• Driving synthesis, static timing analysis, lint, and CDC/formal checking flows to ensure design quality and compliance with stringent requirements.
• Providing technical leadership and mentoring to other team members, fostering a culture of continuous learning and innovation.
• Engaging with cross‑site, international teams to deliver IP solutions optimized for server, AI/ML, automotive, and other end‑customer applications.

• Enable Synopsys' customers to accelerate time‑to‑market with differentiated, high‑performance SoC solutions.
• Contribute to the world's broadest portfolio of silicon IP, supporting a wide range of applications from cloud servers to autonomous vehicles.
• Raise the bar for design quality and reliability by implementing industry best practices in verification, synthesis, and safety.
• Drive innovation in digital design methodologies and IP core architectures, influencing the direction of future product development.
• Mentor and upskill team members, cultivating technical excellence and collaborative problem‑solving within the team.
• Play a key role in Synopsys' global Solutions Group, delivering complex IPs that power next‑generation technologies.

• Bachelor's or Master's degree in Electrical/Electronics Engineering, with 15+ years of relevant experience in ASIC digital design.
• Deep knowledge of one or more protocols: DDR, PCIe, AMBA (AMBA2, AXI, CHI), SD/eMMC, Ethernet, USB, MIPI.
• Hands‑on expertise in Verilog/System Verilog coding, simulation, and advanced EDA tools.
• Strong proficiency in synthesis flow, static timing analysis, lint, CDC, and formal checking methodologies.
• Experience in developing micro‑architecture and detailed design from functional specifications.
• Fa…