Dry Etch Process Engineer | AI-Driven Yield

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron's Technology Development organization, where advanced ideas become manufacturable technologies. Our team works at the groundbreaking of memory innovation, partnering across design, integration, manufacturing, and equipment suppliers to enable the next generation of semiconductor devices.

This is where curiosity, experimentation, and impact come together!

As a Dry Etch Process Engineer you will build, integrate, and optimize plasma etch processes that enable next-generation memory devices. You will work hands‑on with etch equipment, chamber hardware, consumables, and metrology, using data‑driven methods to improve critical dimension control, profile, selectivity, uniformity, and defect performance. You will collaborate closely with integration, lithography, thin films, CMP, device, and manufacturing teams to mature processes from R&D into high‑volume manufacturing.

This role is full‑time at the NYC site in Albany, New York. You will work closely with our EUV Photo Lithography process team in NYC. You will also collaborate with our Technology Development teams in Boise, USA, and Hiroshima, Japan. Together, you will develop robust dry etch solutions aligned to Micron's technical roadmap. NYC is a diverse consortium, and you will have many opportunities to work closely with suppliers and other companies while protecting Micron's intellectual property (IP).

This role supports the design and deployment of AI‑enabled solutions that improve efficiency and decision‑making.

• Develop, qualify, and sustain dry etch (plasma) unit processes for sophisticated memory technologies (e.g., dielectric, conductor, and hardmask etch)
• Optimize critical process metrics including CD control, etch profile/anisotropy, selectivity, microloading, uniformity, and line edge/line width roughness
• Drive defect reduction and yield improvement using inline/out-of-line metrology, DOEs, SPC, and statistical data analysis
• Perform root-cause analysis and implement corrective actions for process excursions, tool health issues, and integration-related failures
• Partner with equipment vendors on chamber matching, hardware and recipe development, new capability evaluations, and cost-of-ownership improvements
• Document process baselines, change controls, and learning; communicate results and support the transition of technology to large-scale production

• M.S. or Ph.D. in Electrical Engineering, Materials Science, Physics, Chemistry, Chemical Engineering, Mechanical Engineering, or a related engineering/technical field relevant to plasma processing and semiconductor manufacturing
• B.S. with 3+ years of semiconductor processing experience with emphasis on dry etch/plasma etch will also be considered
• Experience in semiconductor process development or sustaining engineering, including DOE planning/execution and statistical data analysis
• Working knowledge of plasma etch fundamentals, chamber hardware, and process characterization (profile, CD, selectivity, uniformity, defectivity)
• Ability to collaborate effectively across multi‑functional technical teams and communicate results clearly
• AI proficiency or AI-enabled ways of working

• Hands‑on experience with sophisticated dry etch platforms (e.g., ICP/RIE) and chamber matching across fleets
• Familiarity with pattern transfer challenges (ARDE, microloading, footing/notching) and integration with lithography/hardmask stacks)
• Ex…