Senior Mixed-Signal Verification Engineer Analog IP
Listed on 2026-10-07
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Engineering
Electronics Engineer
onsemi is looking for a Mixed-Signal Verification Engineer III in Texas. This role involves verifying analog and mixed-signal IP for digital SoC environments on the Treo platform, employing System Verilog and behavioral modeling techniques.
The ideal candidate has at least 6 years of verification experience, strong skills in System Verilog and UVM, and familiarity with power management architectures. The position offers an exciting opportunity for career growth within a collaborative team.
We are seeking a motivated Senior Mixed-Signal Verification Engineer Analog IP to join onsemi in Allen, TX, United States.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Mixed-Signal Verification Engineer Analog IP role in the description above.
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