Senior RTL Verification Engineer - FPGA/ASIC; Impact
Job in
1000, Amsterdam, North Holland, Netherlands
Listed on 2026-05-18
Listing for:
Fortaegis Technologies
Full Time
position Listed on 2026-05-18
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer, Test Engineer
Job Description & How to Apply Below
Fortaegis Technologies is hiring a Design Verification Engineer in Amsterdam. This role involves verifying RTL designs for FPGA and ASIC products, focusing on system-level and block-level requirements. Candidates should possess over 5 years of experience in RTL verification, advanced skills in System Verilog, and familiarity with verification EDA tools. Join a dynamic team pushing the boundaries of semiconductor technology in a collaborative environment that values innovation and attention to detail.
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Position Requirements
10+ Years
work experience
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