Senior Digital IC Design Engineer — Low-Power DSP & SoC
Listed on 2026-11-01
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Engineering
Hardware Engineer, Systems Engineer, Electronics Engineer
Neuralink is seeking a Digital IC Design Engineer to deliver RTL and micro-architecture for low-power digital IPs and systems, focusing on DSPs and hardware accelerators used in brain-computer interfaces. The role demands strong background in micro-architecture, RTL, and energy-aware design across complex digital systems.
You will work with firmware teams to optimize hw/sw interfaces, perform energy/performance analyses, and contribute to silicon bring-up and verification efforts.
The Senior Digital IC Design Engineer — Low-Power DSP & SoC position in the IT & Technology, Engineering field is open for applications.
As a Senior Digital IC Design Engineer — Low-Power DSP & SoC, you will play an important part at Neuralink in CA, United States.
We invite applications for the Senior Digital IC Design Engineer — Low-Power DSP & SoC position located in CA, United States.
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