Senior Chip Lead - Physical Design Architect
Listed on 2026-10-13
-
Design & Architecture
Engineering Design & Technologists, CAD/ AutoCAD/ Mechanical Design
Cadence Design Systems, Inc. in Austin seeks highly skilled Physical Design Architects and Chip Leads to drive RTL-to-GDS services for advanced FinFETs. You will lead a design team, own critical decisions, and work with customers to meet PPAS targets.
Key responsibilities include directing design for test, sign‑off criteria, and toolchain optimization, with collaboration across Cadence and client teams. This role requires extensive experience, high-level problem solving, and strong scripting
Step into the Senior Chip Lead
- Physical Design Architect role at Cadence Design Systems, Inc. in Austin, TX, United States and grow with us.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Chip Lead
- Physical Design Architect role in the description above.
We appreciate your interest in this position.
Join Cadence Design Systems, Inc. and contribute to our ongoing work.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).