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Sr. Engineer - Digital Verification

Job in Austin, Travis County, Texas, USA
Listing for: Ambiq Micro Inc
Full Time position
Listed on 2025-10-30
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Sr. Engineer - Digital Verification New United States

Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With the increasing power requirements of artificial intelligence (AI) computing, our customers are relying on our solutions to deliver AI to edge environments. Our hardware and software innovations fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs without expensive process geometry scaling.

We began in 2010 by addressing the power consumption challenges of battery-powered devices at the edge, where they were most pronounced. As of the beginning of 2025, we have shipped more than 2 8 0 + million units worldwide.

Our innovative and fast-moving teams of design, research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin), Taiwan (Hsinchu), China (Shanghai and Shenzhen), and Singapore. We value relentless technology innovation, a deep commitment to customer success, collaborative problem-solving, and an enthusiastic pursuit of energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies.

We encourage and nurture an environment that fosters growth and opportunities to work on complex, meaningful, and challenging projects, creating a lasting impact and shaping the future of technology. Join us on our quest for enabling billions of intelligent devices. The intelligence everywhere revolution starts here.

Responsibilities

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

Specific responsibilities include:
  • The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.
  • Develop test plans at block, sub-system, and chip level.
  • Execute SoC-based verification at full-chip.
  • Write C-based lib packages and tests.
  • Architect and implement scalable and reusable test benches using System Verilog and UVM.
  • Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
  • Automating the test environment for randomized testing and score boarding.
  • Utilize advanced debugging techniques to identify and resolve design and verification issues.
  • Perform root-cause analysis and work with design teams to fix identified issues.
  • Define and track functional and code coverage metrics to ensure thorough verification.
  • Ensure that verification quality meets or exceeds industry standards and project requirements.
  • Edge-based AI inference is preferred.
Requirements
  • BSEE / MSEE with 5-8 years of experience in block, sub-system, and full-chip verification.
  • Should have delivered multiple chips functioning to specification.
  • Identify and manage verification deliverables, milestones, and schedules.
  • Proactively identify potential verification risks and develop mitigation strategies.
  • Collaborate with design, architecture, and software teams to understand and verify design intent.
  • Communicate verification progress, issues, and results to stakeholders and management.
  • Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges.
  • Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.
  • C-based verification in an SoC environment is required.
  • Experience with ARM processor-based designs and low-power design techniques is a plus.
  • Languages:

    System Verilog (UVM), Verilog, C/C++, Python, Perl or Makefile.
  • Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5.
  • Preferred technologies: MIPI (CSI/DSI), Crypto, OTP, DSP, Low-Power.
What You Need

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