Digital Design Summer​/Fall Co-Op

Job Title

Digital Design Summer/Fall Co‑Op (June '26 - Dec '26)

8/26/25

Austin

75952

Seeking a digital design co‑op interested in developing complex mixed‑signal ICs for frequency control, clock generation, network synchronization, and other timing applications. The candidate will take a supporting role and will be involved in all aspects of the design process from system conceptualization to mass production. For example, a candidate may participate in digital system architecture, block‑ and system‑level RTL design/coding, algorithm and firmware development, digital circuit back‑end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and/or full‑chip mixed‑signal verification.

Responsibilities may also include detailed documentation, test vector development, lab test and evaluation, and other activities as required for the achievement of high‑volume production.

Term:
Summer/Fall Co‑Op (June '26 - Dec '26)

• Digital design specification, design, analysis, and HDL (Verilog/System Verilog) coding
• Behavioral modeling of analog and mixed signal circuits
• Digital back‑end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc.
• Verification of digital sub‑systems, mixed‑signal sub‑systems, and the entire chip using a combination of digital models/RTL, firmware, and behavioral models. Test bench development
• Validation of silicon functionality, behavior, and performance

• B.S. or M.S. in Electrical (and/or Computer) Engineering, pursuing further studies
• Strong motivation to contribute to all facets of chip design, from conceptualization to release to mass production
• Working knowledge of digital IC circuit design in an HDL synthesis environment
• Working knowledge of digital verification and testing techniques
• Good verbal and written communication and presentation skills, positive attitude, and willingness to work on a team
• Working knowledge of UNIX operating systems

• Experience with digital design at geometries ranging from 130‑22 nm
• Experience with digital IO interfaces such as I2C, SPI, etc.
• Competence in high‑level languages (e.g., Matlab,
  
  C), scripting languages (e.g., Tcl, Perl, Python, SKILL), and version control systems (e.g., SVN, SOS)
• Working knowledge of System Verilog and/or UVM
• Experience leading a team of digital designers, either formally or informally
• Experience with embedded processor design and firmware/software development, especially for 8051 or ARM cores
• Competence in exploring digital and firmware system/architecture trade‑offs, such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP
• Experience with memory generators and MBIST
• Low‑power design and implementation techniques

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The typical pay range for an Engineering intern across the U.S. is currently USD $26.00 - $47.50 per hour and for a Non‑Engineering intern across the U.S. is currently USD $22.50 - $42.00 per hour. Starting pay will depend on level of education, the ultimate job duties and requirements, and work location. Skyworks has different pay ranges for different work locations in the U.S.

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at a