Silicon Design Engineer

Silicon Design Engineer

Join to apply for the Silicon Design Engineer role at AMD.

Base pay range: $/yr – $/yr. This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

We accelerate next‑generation computing experiences—from AI and data centers to PCs, gaming and embedded systems. Our culture of innovation and collaboration drives bold ideas. When you join AMD, you’ll experience a culture that pushes innovation limits while promoting execution excellence, humility, collaboration, inclusivity, and diverse perspectives. Together, we also advance your career.

The focus of this role in the AECG ASIC organization is to drive physical design for next‑generation ASICs that meet Engineering, Business and Customer requirements.

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player with excellent communication skills and experience collaborating with engineers at different sites and time zones. You have strong analytical and problem‑solving skills, are willing to learn, and ready to take on problems.

• Define and drive Physical Design methodologies.
• Partner with physical design teams to ensure seamless end‑to‑end design flows.
• Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug.
• Work closely with design teams to gather requirements and develop strategies to tackle key technical problems.
• Work on floor‑plan, physical implementation of power‑plan, synthesis, placement, CTS, timing closure, routing, extraction, physical verification (DRC & LVS), crosstalk analysis, EM/IR.
• Handle different PNR tools – Synopsys ICC2, ICC, Design Compiler, Prime Time, StarRC, Mentor Graphics Calibre, Apache Redhawk.

• Professional experience in physical design, preferably with high‑performance designs.
• Experience in automated synthesis and timing‑driven place and route of RTL blocks for high‑speed datapath and control logic applications.
• Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction.
• Experience in floor planning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery.
• Strong experience with tools for logic synthesis, place and route, timing analysis, design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation.
• Versatility with scripts to automate design flow.
• Strong communication skills, ability to multi‑task across projects, and work with geographically spread out teams.
• Excellent physical design and timing background.
• Strong analytical/problem‑solving skills and pronounced attention to details.

• Bachelors or Masters degree in Computer Engineering / Electrical Engineering.

Austin, TX

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Mid‑Senior level

Full‑time

Semiconductor Manufacturing