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Senior ASIC Design Engineer - Hardware

Job in Austin, Travis County, Texas, 78716, USA
Listing for: NVIDIA
Full Time position
Listed on 2026-01-01
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 168000 - 264500 USD Yearly USD 168000.00 264500.00 YEAR
Job Description & How to Apply Below

Senior ASIC Design Engineer – Hardware

NVIDIA’s System‑On‑Chip (SOC) group is seeking an ASIC Design Engineer to improve methodologies and deliver system‑level IP that measures performance across multiple projects. The role focuses on RTL development, performance monitoring, and cross‑domain verification to support the next era of AI‑driven graphics and computing.

What You’ll Be Doing
  • Define, develop, and deliver system‑level methodologies and RTL to measure performance on GPUs and SOCs.
  • Develop and automate flows and tools to efficiently build, deliver, and support system‑level IP.
  • Deliver IP and support projects through performance monitoring systems.
  • Run and debug RTL checks to ensure design quality (CDC, clocks, resets, latency, etc.).
  • Design and implement RTL features (micro‑architecture and RTL).
  • Collaborate with architects, designers, and software engineers to accomplish tasks.
What We Need To See
  • BS or equivalent in Electrical/Computer Engineering; advanced degrees (MS, PhD) a plus.
  • 3+ years of industry experience and strong coding skills in Perl/Python or equivalent scripting languages.
  • Experience in RTL design (Verilog), verification (System Verilog), SOC design/implementation flow, and design automation.
  • Solid understanding of SOC architecture (CDC, multiple power domains, performance analysis, latency, data flow).
  • Excellent debugging and analytical skills.
  • Exposure to synthesis ( or equivalent), simulation (VCS or equivalent), and debug tools (Debussy, GDB).
  • Strong communication and collaboration skills for cross‑functional teams.
Ways to Stand Out
  • Object‑oriented programming experience.
  • Prior design on system‑level IP (Clocks/DFT/Resets).
  • Experience developing methodologies used by others.
  • Hands‑on silicon debug.
  • Exposure to physical design.
Compensation

Base salary ranges:
Level 3 – $136,000 – $212,750;
Level 4 – $168,000 – $264,500. Equities and benefits are also available.

Final date to receive applications

Applications accepted until November 24, 2025.

Equal Opportunity Statement

NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability, or any other characteristic protected by law.

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Position Requirements
10+ Years work experience
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