SoC Chiplet Design Lead

SoC Chiplet Design Lead
Santa Clara, CA;
Austin, TX;
Ottawa, CA;
Toronto, CA;
Boston, MA
Full-time

$200,000 - $250,000 base salary + bonus + equity

An innovative AI technology company at the forefront of RISC-V CPU and AI platform development is looking for a SoC Chiplet Design Lead to drive the creation of advanced System-on-Chip (SoC) architectures. This pivotal role offers the chance to lead projects that shape next-generation computing solutions, working alongside multidisciplinary teams and cutting-edge technologies.

This position is based out of Toronto, Ottawa, Boston, Austin, or Santa Clara, with the possibility of remote work within North America.

• Oversee the complete lifecycle of SoC chiplet designs, from initial concept through to production.
• Partner with teams across architecture, systems, and packaging to balance trade-offs in performance, power, cost, and features.
• Lead efforts in RTL design, design-for-test (DFT) strategies, SoC verification, synthesis, and timing optimization.
• Collaborate closely with teams in software, hardware, and physical implementation to ensure seamless functionality and integration.
• Organize and lead technical reviews, offering direction and feedback to engineering teams.
• Work with project management to establish realistic timelines and deliverables.
• Manage third-party relationships, ensuring timely integration of vendor and IP components.
• Stay informed of emerging technologies and industry trends to maintain a competitive edge.
• Mentor and develop junior engineers, fostering a collaborative and growth-oriented team culture.

• A degree in Electrical Engineering, Computer Engineering, or a closely related field.
• 8+ years of hands-on experience in SoC design and development.
• Demonstrated success leading SoC projects from concept to high-volume production.
• Expertise in RTL design using Verilog or System Verilog.
• In-depth knowledge of SoC verification tools and methodologies such as UVM, System Verilog, or similar.
• Experience with synthesis, timing analysis, and place-and-route workflows.
• Familiarity with DFT and debugging strategies in large-scale designs.
• Strong understanding of embedded software and its interplay with hardware systems.
• Exceptional problem-solving, organizational, and communication skills.

• Familiarity with advanced process nodes (e.g., 7nm, 5nm).
• Knowledge of techniques for low-power design.
• Experience with high-speed interfaces like PCIe, UCIe, DDR, or Ethernet.
• Hands-on use of tools from major EDA vendors such as Synopsys, Cadence, or Mentor Graphics.