Senior Firmware Architect - DDRPHY & Silicon
Listed on 2026-10-06
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Engineering
Hardware Engineer, Systems Engineer, Embedded Software Engineer
Cadence Design Systems in Austin is seeking a firmware engineer to join the DDR5 PHY IP Front End Design team. You will develop firmware for DDR5 PHY using microcontrollers and C, creating bare-metal APIs and collaborating with hardware designers and memory subsystem architects.
You will also work with verification teams on firmware-hardware co-verification, debug RTL-based simulations, and assist on silicon bring-up boards, contributing to high-speed interfaces and tooling with scripting.
The Senior Firmware Architect - DDR5 PHY & Silicon Bring-up role at Cadence Design Systems is now open for applications in Austin, TX, United States.
Are you ready to take on the Senior Firmware Architect - DDR5 PHY & Silicon Bring-up role at Cadence Design Systems?
We would love to welcome a new Senior Firmware Architect - DDR5 PHY & Silicon Bring-up to our organisation in Austin, TX, United States.
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