BE CAD Physical Impl and AI Engineer Product Development Posted ago

** Principal Back-End CAD Engineer – Physical Implementation & AI, Austin, Texas
** This is an on-site, hybrid work schedule.
** This is not a remote work opportunity.
**** About the Role
** As part of PEU Silicon and the Silicon CAD group, we are building the next generation of silicon development infrastructure and methodologies that power our ASIC roadmap.  We are looking for a highly experienced Back-End CAD engineer who combines deep Physical Design expertise with a passion for automation, methodology development, and AI-driven innovation.  This role goes far beyond traditional CAD support.

You will own and evolve our Back-End implementation framework, Flow Jam, working directly with Physical Design teams to deliver industry-leading Power, Performance, Area, and Productivity across multiple ASIC programs.  You will help define how future physical implementation is performed—from advanced-node synthesis and place-and-route methodologies to AI-assisted design optimization and next-generation CAD infrastructure.  If you enjoy solving hard problems, building scalable engineering platforms, and influencing the future of silicon development, we'd like to talk.

** What You Will Do*
* • Lead the architecture, development, and evolution of Flow Jam, our Back-End CAD flow framework.  
• Partner closely with Physical Design teams to drive implementation methodology and execution across multiple ASIC programs.  
• Develop and optimize synthesis, place-and-route, timing closure, power optimization, and signoff methodologies for advanced technology nodes.  
• Drive continuous improvements in QoR, runtime, scalability, and engineering productivity.  
• Define reusable methodologies and automation frameworks that accelerate project execution.  
• Evaluate and deploy next-generation EDA capabilities across both Synopsys and Cadence tool ecosystems.  
• Collaborate with EDA vendors to drive methodology improvements, debug tool issues, and influence future capabilities.  
• Explore and integrate AI technologies that improve implementation, design-space exploration, closure, debug, and engineering efficiency.  
• Help define the long-term roadmap for Back-End CAD and physical implementation within PEU Silicon.  
• Mentor engineers and help build a culture of technical excellence and execution.  
** What You Bring*
* • 10+ years of experience in Physical Design, Back-End CAD, or Physical Implementation Methodology.  
• Deep expertise in synthesis, floor planning, placement, clock-tree synthesis, routing, timing closure, and power optimization.  
• Strong hands-on experience with Synopsys Fusion Compiler and/or Cadence Innovus.  
• Proven experience developing and deploying methodologies on advanced technology nodes.  
• Strong understanding of complete RTL-to-GDS implementation flows.  
• Expertise in Python, Tcl, and automation framework development.  
• Experience driving methodology improvements across multiple projects and engineering teams.  
• Strong communication and leadership skills with the ability to influence engineers, project teams, and EDA vendors.  
• Curiosity about how AI will transform silicon development and enthusiasm for building the next generation of engineering workflows.## Join our Team
** Why Join Us
** This is a rare opportunity to shape the future of physical implementation within a high-performing silicon organization.  You'll work on challenging ASIC programs, influence critical engineering decisions, partner directly with leading EDA vendors, and help define how AI transforms semiconductor development.  We're an execution-focused team that values ownership, technical excellence, and delivering results. We move quickly, solve difficult problems, and build solutions that matter.
** Education &…