Director, Analog Design

** Director, Analog Design
**** About the Role
** As Director of Analog Design in the Digital Business Unit, you will lead a small team of analog engineers developing critical analog IP for complex system-on-chip (SoC) products. You will combine hands-on technical depth with people leadership, portfolio execution, and cross-functional influence to deliver robust oscillators, ADCs, DACs, PLLs, power-management circuits, and low-power architectures from concept through high-volume production.  
** Key Responsibilities**
* ** Lead and develop a small analog design team**, setting clear priorities, coaching engineers, building technical depth, and fostering accountability, collaboration, and career growth
* ** Own delivery of analog and mixed-signal IP for Digital Business Unit So Cs
** from architecture and specification through schematic design, verification, layout, characterization, qualification, and production release
* ** Direct the design of key SoC functions
** including oscillators and clock references, ADCs, DACs, PLLs and clock-generation circuits, power-management blocks, monitors, biasing, reset, and low-power control circuitry
* ** Drive system-level architecture and partitioning**, balancing performance, power, area, cost, schedule, reuse, manufacturability, and product risk across analog and digital boundaries
* ** Establish robust design and review practices
** for specifications, modeling, simulation, layout, verification, and signoff across process, voltage, temperature, aging, mismatch, noise, and parasitic variation
* ** Partner closely with digital design, verification, physical design, systems, product, test, applications, process, packaging, and firmware teams
** to define interfaces, power intent, clocking, reset, calibration, trim, testability, behavioral models, and silicon bring-up plans
* ** Lead low-power design strategy**, including power-domain partitioning, power gating, retention, sequencing, dynamic power reduction, standby modes, wake-up behavior, and analog performance during supply transitions
* ** Manage execution across multiple projects and IP developments**, allocating resources, tracking milestones and dependencies, identifying technical and staffing risks, and driving timely closure of critical issues
* ** Guide IP reuse and methodology improvement
** by developing scalable architectures, documentation, design automation, verification approaches, and lessons learned that improve quality and predictability across SoC programs
* ** Support silicon validation and production**, leading root-cause analysis and corrective action for complex lab, yield, reliability, and customer issues
* ** Influence product and technology roadmaps
** by translating business and customer needs into analog capability plans, investment priorities, and differentiated SoC solutions
* ** Build organizational capability
** through hiring, performance management, succession planning, mentoring, and effective use of internal and external design resources
** Must Have Skills**
* ** People Leadership**:
Demonstrated success leading, coaching, and retaining a small team of analog or mixed-signal IC designers while setting expectations and developing future technical leaders
* ** Analog and Mixed-Signal SoC Expertise**:
Deep knowledge of transistor-level design and mixed-signal integration in CMOS SoCs, with expertise in several of the following: oscillators, ADCs, DACs, PLLs, clocking, references, regulators, power management, and low-power circuitry
* ** System Architecture**:
Ability to translate product requirements into analog specifications, partition functions across analog, digital, firmware, and test domains, and make sound power-performance-area-cost tradeoffs
* ** Low-Power Design**:
Strong understanding of power domains, sequencing, retention, power gating, standby and wake-up behavior, leakage reduction, and mixed-signal operation across dynamic supply conditions
* ** Design Quality and Signoff**:
Mastery of SPICE-based simulation, statistical and corner analysis, noise and stability analysis, extraction, layout review, DRC/LVS, reliability, and design-for-test considerations
* ** Program Execution**:
Proven ability to plan and deliver multiple IP and SoC programs, manage priorities and dependencies, assess risk, and drive decisions under schedule and resource constraints
* ** Cross-Functional Leadership**:
Ability to align analog, digital, verification, physical design, systems, test, applications, process, packaging, and…