STA Engineer

Join Apple as an ASIC STA Engineer and be part of a dynamic team dedicated to transforming hardware technology. This role offers the opportunity to work on innovative products that enhance customer experiences and contribute to Apple's commitment to excellence and sustainability.

Responsibilities:

• Lead edge IP development and coordinate with multiple SOC teams.
• Execute design and integration tasks for high-quality IP deliverables.
• Own full chip and block level timing closure and constraints throughout the project.
• Collaborate with SoC Design, Verification, DFT, Architecture, and Physical Design teams.
• Work with CAD and Flow teams to define and improve front-end design methodologies.
• Develop and maintain methodologies and flows related to timing analysis.

Qualifications:

• Bachelor's Degree in a relevant field.
• 0 years of experience.

Skills:

• Familiarity with ASIC design timing concepts.
• Proficient in scripting languages such as TCL, Python, and Perl.
• Exposure to STA tools like Primetime and writing timing constraints.
• Knowledge of timing corners/modes and front-end tools/methodologies such as Synthesis and Logic equivalence checks.
• Self-starter and highly motivated.
• Excellent communication skills across internal groups.