Senior DFT Architect AI ASICs; Onsite
Listed on 2026-10-17
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Engineering
Systems Engineer, Hardware Engineer -
IT/Tech
Systems Engineer, Hardware Engineer
Neurophos, Inc. is hiring a DFT Architect to own design-for-test for a cutting-edge ASIC. You will define the DFT strategy for the full chip, own coverage signoff, and collaborate with RTL and analog/physical teams to build testability in from day one.
This is the first dedicated DFT hire and includes leading the test program through post-silicon phases. You will develop functional test vectors, architect on-die memory testing, and deploy a scalable DFT flow with near-100% coverage goals across
Join us at Neurophos, Inc. as our next Senior DFT Architect for AI ASICs (Onsite) in Austin, TX, United States.
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