Senior RTL Design Engineer - Low-Power SoC & Equity
Listed on 2026-10-17
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Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer
Efficient Computer in San Francisco, CA is seeking a Senior Design Engineer to design, integrate, and sign off RTL for blocks across the power-efficient SoC, including on-chip interconnects and memory interfaces. You will take blocks from microarchitecture specs through synthesis-ready RTL and help tape out industry-leading ultra-low-power solutions.
This is a hands-on role joining a growing HW engineering team as we move from initial product development to market release and scaled volume
This posting is for the Senior RTL Design Engineer
- Low-Power SoC & Equity role at Efficient Computer, based in Austin, TX, United States.
The advertised compensation is 180..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior RTL Design Engineer
- Low-Power SoC & Equity role in the description above.
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