SOC Physical Design Engineer: Power, Timing & Integration

Apple Inc. in Austin, Texas is seeking a seasoned physical design engineer to implement SOC blocks from netlist to tape-out in advanced nodes.

You will collaborate with RTL and FE teams to understand architecture, drive physical design, and optimize power, performance, and area while improving methodologies and flows. The role requires strong scripting (Perl, Shell, TCL) and experience with EDA tools such as Innovus, IC Compiler, Primetime, and Calibre.

We are seeking a motivated SOC Physical Design Engineer:
Power, Timing & Integration to join Apple Inc. in Austin, TX, United States.

As a SOC Physical Design Engineer:
Power, Timing & Integration, you will play an important part at Apple Inc. in Austin, TX, United States.

We invite applications for the SOC Physical Design Engineer:
Power, Timing & Integration position located in Austin, TX, United States.